The silicon advantage: How semiconductor manufacturing aims to solve the quantum computing scaling challenge

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The silicon advantage: How semiconductor manufacturing aims to solve the quantum computing scaling challenge

Authors: Roman Aseguinolaza, Quantum Hardware Predoctoral Researcher at CIC nanoGUNE & M. Fernando Gonzalez-Zalba, Quantum Hardware Group Leader and Ikerbasque Research Professor at CIC nanoGUNE

The material at the heart of the digital revolution, silicon, is now a leading candidate for building large-scale quantum computers. This strategy leverages the most mature and powerful manufacturing technology on Earth to control the fundamental quantum property of an electron: its spin. Recent breakthroughs in silicon-based spin qubits have demonstrated gate fidelities that meet the stringent requirements for quantum error correction—a critical milestone for building fault-tolerant machines that can solve problems of practical significance 1. This represents a pragmatic approach to the immense challenge of scaling quantum hardware. Although pioneering platforms such as superconducting circuits and trapped ions have proven the potential of quantum computation, they face significant hurdles in scaling to the millions of qubits required for advanced algorithms. Silicon quantum computing offers a compelling path forward, not by avoiding the common challenges like cryogenic operation but by harnessing five decades of semiconductor industry expertise to integrate quantum components with the precision and scale of modern microelectronics.

The Brixton chip: An integrated circuit containing more than 4,000 silicon quantum dot devices. Source: Quantum Motion.

The Quantum Challenge Landscape

Building a quantum computer presents an almost paradoxical challenge: harnessing the most delicate quantum effects while creating a robust, practical machine. Quantum bits (qubits) must maintain their fragile quantum properties while being precisely controlled and measured thousands of times per second.

A useful way to understand this complexity is to view a quantum computer as a full stack, composed of three distinct layers. The first is the quantum layer, where the qubits themselves reside and perform calculations. Above this sits the quantum-classical interface, containing the electronics that translate classical commands into the precise analog signals needed to control and read the qubits. Finally, the classical layer executes error-correction protocols and manages the overall computation. Building a fault-tolerant machine requires optimizing and integrating all three layers, a challenge that silicon is uniquely positioned to address.

Silicon’s Industrial Advantage

The promise of silicon quantum computing lies not just in its physics, but in its compatibility with complementary metal-oxide-semiconductor (CMOS) technology—the manufacturing foundation that produces billions of transistors with nanometer precision.

Silicon qubits can be defined in footprints as small as 100 × 100 nanometers, enabling the highest qubit density of any quantum computing platform 2. More importantly, the CMOS toolkit opens a path to manufacturing all three layers of the quantum computing stack using the same industrial processes. This allows for monolithic integration, where quantum and classical-control circuits are fabricated on the same chip, a key strategy for solving the I/O problem of how to wire and control millions of qubits efficiently. Leveraging the existing, highly advanced semiconductor manufacturing infrastructure is arguably silicon’s greatest advantage.

Current State: Beyond Proof-of-Principle

Silicon quantum computing has rapidly progressed from academic curiosity to industrial reality. Research groups have demonstrated single-qubit fidelities exceeding 99.9% 3 and two-qubit fidelities surpassing 99% 4, both of which exceed the fault-tolerance thresholds demanded by quantum error correction protocols. Recent industrial demonstrations have elevated single-qubit fidelities beyond 99.9% uniformly across 300 mm CMOS wafers, showcasing manufacturability at scale 5.

These achievements are built on a foundation of key technical advances across the full system stack. At the quantum layer, the development of isotopically enriched silicon (²⁸Si) has reduced magnetic noise, extending qubit coherence times. At the interface layer, new techniques have enabled fast and high-fidelity qubit readout, with some methods achieving 99.9% fidelity in a few microseconds 67. Furthermore, demonstrations of qubit fabrication on industrial 300 mm wafers and the operation of cryo-CMOS control chips alongside qubits prove that the core vision of integration is sound 8910.

Building on these fidelities, silicon quantum processors with up to four qubits have successfully run benchmark algorithms like Grover’s search, achieving success probabilities around 95% 11, and more recently algorithms on a six-qubit processor have been tested 12. These demonstrations prove that silicon quantum computing has moved beyond single-qubit experiments toward the multi-qubit systems required for useful algorithms.

silicon
Visualization of a six-dot device in silicon, enabling universal logic with encoded spin qubits (Weinstein, A. J. et al. (2023). Universal logic with encoded spin qubits in silicon. Nature 615, 817–822. doi: 10.1038/s41586-023-05777-3 ). Source: HRL Laboratories

The Engineering Reality Check

Despite impressive laboratory demonstrations, formidable technical challenges remain across all layers of the quantum computer. A central issue at the quantum layer is qubit variability; manufacturing millions of nearly identical qubits is incredibly difficult when performance can be affected by defects at the single-atom level. Ensuring high-fidelity control and readout across a large array while managing issues like signal cross-talk is another major hurdle.

At the quantum-classical interface, a key challenge is engineering the cryo-CMOS control electronics. These circuits must operate reliably at deep cryogenic temperatures, where transistor behavior changes and the available cooling power is extremely limited—typically less than 1 mW at the qubit stage. This puts a strict power budget on the control electronics needed for fast feedback in error correction. Finally, the overall system architecture must solve the immense I/O problem of routing potentially millions of control lines to the quantum chip.

The Path Forward

Advancing silicon quantum computing will require coordinated progress across several interconnected fields. The path ahead emphasizes gradual, scalable improvements rather than a single leap to million-qubit processors. Key focus areas include developing modular architectures that can be linked coherently to build larger systems; refining manufacturing processes to reduce variability and improve qubit yield; enhancing computer-aided design tools to accelerate device optimization; and fostering a robust ecosystem including standardized fabrication services and workforce training.

This multifaceted approach leverages silicon’s industrial strengths and addresses the full quantum computing stack, moving steadily toward fault-tolerant, large-scale quantum information processors.

Ultimately, silicon quantum computing represents more than just another approach; it embodies the possibility of making quantum technology as ubiquitous and reliable as classical computing. Whether this silicon dream becomes reality will determine not just the future of quantum computing, but potentially the trajectory of information technology itself.

 
 

References

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  2. Veldhorst, M. et al. (2017). Silicon CMOS architecture for a spin-based quantum computer. Nature Communications 8, 1766. doi: 10.1038/s41467-017-01905-6 ↩
  3. Wu, Y.-H. et al. (2025). Simultaneous High-Fidelity Single-Qubit Gates in a Spin Qubit Array. arXiv:
    2507.11918 [quant-ph]. URL: https://arxiv.org/abs/2507.11918 ↩
  4. Xue, X. et al. (2022). Quantum logic with spin qubits crossing the surface code threshold. Nature 601, 343–347.doi: 10.1038/s41586-021-04273-w ↩
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  7. Lainé, C. et al. (2025). High-fidelity dispersive spin sensing in silicon MOS quantum dots. arXiv:2505.10435. arXiv: 2505.10435 [quant-ph]. URL: https://arxiv.org/abs/2505.10435 ↩
  8. Zwerver, A. M. J. et al. (2022). Qubits made by advanced semiconductor manufacturing. Nature Electronics 5, 184–190. doi: 10.1038/s41928-022-00727-9 ↩
  9. Chittock-Wood, J. F. et al. (2025). Radio-frequency cascade readout of coupled spin qubits. arXiv: 2408 . 01241 [cond-mat.mes-hall]. URL: https ://arxiv.org/abs/2408.01241 ↩
  10. Clarke, I. C. et al. (2025). Spin Readout in a 22 nm Node Integrated Circuit. arXiv:2510.13674. arXiv: 2510.13674
    [quant-ph]. URL: https://arxiv.org/abs/2510.13674 ↩
  11. Thorvaldson, I. et al. (2025). Grover’s algorithm in a four-qubit silicon processor. Nature Nanotechnology 20, 472–477. doi: 10.1038/s41565-024-01853-5 ↩
  12. Fuentes, I. F. de et al. (2025). Running a six-qubit quantum circuit on a silicon spin qubit array. arXiv:2505.19200. arXiv: 2505.19200 [quant-ph]. URL: https://arxiv.org/abs/2505.19200 ↩

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